Philips 74HC283
The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC283 is specified in compliance with JEDEC standard no. The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).| Part No. | 74HC283 |
|---|---|
| Datasheet | 74HC283 Download |
| Manufacturer |  Philips |
| Description | 4-bit binary full adder |
| Buy | Stock & Price |
FEATURES
s High-speed 4-bit binary addition s Cascadable in 4-bit increments s Fast internal look-ahead carry s Low-power dissipation s Complies with JEDEC standard no. 7A s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Specified from −40 °C to +80 °C and from −40 °C to +125 °C. Philips Semiconductors 74HC283 4-bit binary full adder with fast carry 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol Parameter Conditions Min Typ tPHL, tPLH propagation delay CL = 15 pF; VCC = 5 V CIN to S1 - 16 CIN to S2 - 18 CIN to S3 - 20 CIN to S4 - 23 An or Bn to Sn - 21 CIN to COUT - 20 An or Bn to COUT - 20 CI input capacitance - 3.5 CPD power dissipation VI = GND to VCC [1] - 88 capacitance [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs.
