Philips 74HC297
The 74HC/HCT297 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. The 74HC/HCT297 are designed to provide a simple, cost-effective solution to high-accuracy, digital, phase-locked-loop applications.| Part No. | 74HC297 |
|---|---|
| Datasheet | 74HC297 Download |
| Manufacturer |  Philips |
| Description | Digital phase-locked-loop filter |
| Buy | Stock & Price |
FEATURES
● Digital design avoids analog compensation errors● Easily cascadable for higher order loops
● Useful frequency range: – DC to 55 MHz typical (K-clock) – DC to 35 MHz typical (I/D-clock)
● Dynamically variable bandwidth
● Very narrow bandwidth attainable
● Power-on reset
● Output capability: standard/bus driver
● ICC category: MSI
GENERAL DESCRIPTION
7A. These devices contain all the necessary circuits, with the exception of the divide-by-n counter, to build first order phase-locked-loops. Both EXCLUSIVE-OR (XORPD) and edge-controlled (ECPD) phase detectors are provided for maximum flexibility. The input signals for the EXCLUSIVE-OR phase detector must have a 50% duty factor to obtain the maximum lock-range. Proper partitioning of the loop function, with many of the building blocks external to the package, makes it easy for the designer to incorporate ripple cancellation (see Fig.7) or to cascade to higher order phase-locked-loops. The length of the up/down K-counter is digitally programmable according to the K-counter function table.
