74HC4024 Datasheet | Philips Semiconductors

7-stage binary ripple counter Rev. 03 - 12 November 2004 Product data sheet 1. General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin patible with the 4024 of the 4000B series. The 74HC4024 is specified in pliance with JEDEC standard no. 7A. The 74HC4024 is a 7-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to Q6). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. Schmitt-trigger action in the...