74HC688 Datasheet | Philips Semiconductors

FEATURES - pare two 8-bit words - Output capability: standard - ICC category: MSI GENERAL DESCRIPTION 74HC/HCT688 The 74HC/HCT688 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard no. 7A. The 74HC/HCT688 are 8-bit magnitude parators. They perform parison of two 8-bit binary or BCD words. The output provides P = Q. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL t PHL/ t PLH PARAMETER propagation delay Pn, Qn to P = Q E to P = Q CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in p F VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. where: input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 p F; VCC = 5 V 17 8 3.5 30 17 12 3.5 30 ns ns p F p F HCT UNIT December 1990 Philips Semiconductors Product specification 8-bit magnitude parator PIN DESCRIPTION PIN NO. 1 2, 4, 6, 8, 11, 13, 15, 17 3, 5, 7, 9, 12, 14, 16, 18 10 19 20 SYMBOL E P0 to P7 Q0 to Q7 GND P=Q VCC NAME AND FUNCTION enable input (active LOW) word inputs word inputs ground (0 V) equal to output positive supply voltage 74HC/HCT688 Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. December 1990 Philips Semiconductors Product specification 8-bit magnitude parator 74HC/HCT688 Fig.4 Functional diagram. Fig.5 Logic diagram. FUNCTION TABLE INPUTS DATA Pn, Qn P=Q X P>Q P<Q Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care ENABLE E L H L L OUTPUT P=Q L H H H December 1990 Philips Semiconductors Product specification 8-bit magnitude parator DC CHARACTERISTICS...