Philips 74HC7080
The 74HC/HCT7080 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. The even and odd parity output is available for generating or checking even/odd parity up to 16-bits.FEATURES
● Word-length easily expanded by cascading● Generates either even or odd parity for 16-data bits
● Output capability: standard
● ICC category: MSI
GENERAL DESCRIPTION
7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT7080 The 74HC/HCT7080 are 16-bit parity generators or checkers commonly used to detect errors in high-speed data transmission or data retrieval systems. The even/odd parity output (E/O) is HIGH when an even number of data inputs (I0 to I15) are HIGH and the cascade/even-odd-changing input (X) is HIGH. Expansion to larger word sizes is accomplished by connecting the even/odd parity output (E/O) to the cascade/even-odd-changing input (X) of the final stage. TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay In to E/O X to E/O CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL ×VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2.