Philips 74HC7266
The 74HC7266 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. The 74HC7266 provide the EXCLUSIVE-NOR function with active push-pull output.| Part No. | 74HC7266 |
|---|---|
| Datasheet | 74HC7266 Download |
| Manufacturer |  Philips |
| Description | Quad 2-input EXCLUSIVE-NOR gate |
| Buy | Stock & Price |
FEATURES
● Output capability: standard● ICC category: SSI
GENERAL DESCRIPTION
74HC7266 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V ∑ (CL × VCC2 × fo) = sum of outputs 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay nA, nB to nY input capacitance power dissipation capacitance per gate note 1 CONDITIONS HC CL = 15 pF; VCC = 5 V 11 3.5 17 ns pF pF UNIT December 1990 2 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-NOR gate PINDESCRIPTION
PIN NO. 1, 5, 8, 12 2, 6, 9, 13 3, 4, 10, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND FUNCTION data inputs data inputs data outputs ground (0 V) positive supply voltage 74HC7266 Fig.1 Pin configuration.
