74HC7403
Key Features
- Synchronous or asynchronous operation
- 3-state outputs
- 30 MHz (typical) shift-in and shift-out rates
- Readily expandable in word and bit dimensions
- Pinning arranged for easy board layout: input pins directly opposite output pins
- Output capability: driver (8 mA)
- ICC category: LSI. APPLICATIONS
- High-speed disc or tape controller
- Communications buffer. GENERAL DESCRIPTION The 74HC/HCT7403 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no.7A. The “7403” is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 4 bits. A guaranteed 15 MHz data-rate makes it ideal for high-speed applications. A higher data-rate can be obtained in applications where the status flags are not used (burst-mode). With separate controls for shift-in (SI) and shift-out (SO), reading and writing operations are completely independent, allowing synchronous and asynchronous data transfers. Additional controls include a master-reset input (MR), an output enable input (OE) and flags. The data-in-ready (DIR) and data-out-ready (DOR) flags indicate the status of the device. Note QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
