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74HCT10 Datasheet PDF

Philips 74HCT10

The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. The 74HC/HCT10 provide the 3-input NAND function.
Part No. 74HCT10
Datasheet 74HCT10 Download
Manufacturer
Philips
Description Triple 3-input NAND gate
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74HCT10 datasheet page 1 preview

FEATURES

● Output capability: standard
● ICC category: SSI

GENERAL DESCRIPTION

74HC/HCT10 7A. The 74HC/HCT10 provide the 3-input NAND function. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fO) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V ∑ (CL × VCC2 × fo) = sum of outputs 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V. ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay nA, nB, nC to nY input capacitance power dissipation capacitance per gate notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 9 3.5 12 11 3.5 14 HCT ns pF pF UNIT December 1990 2 Philips Semiconductors Product specification Triple 3-input NAND gate PIN

DESCRIPTION

PIN NO. 1, 3, 9 2, 4, 10 13...
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