Philips 74HCT280
The 74HC/HCT280 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. The 74HC/HCT280 are 9-bit parity generators or checkers commonly used to detect errors in high-speed data QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT280 transmission or data retrieval systems.| Part No. | 74HCT280 |
|---|---|
| Datasheet | 74HCT280 Download |
| Manufacturer |  Philips |
| Description | 9-bit odd/even parity generator/checker |
| Buy | Stock & Price |
FEATURES
● Word-length easily expanded by cascading● Similar pin configuration to the “180” for easy system up-grading
● Generates either odd or even parity for nine data bits
● Output capability: standard
● ICC category: MSI
GENERAL DESCRIPTION
7A. Both even and odd parity outputs are available for generating or checking even or odd parity up to 9 bits. The even parity output (∑E) is HIGH when an even number of data inputs (I0 to I8) are HIGH. The odd parity output (∑0) is HIGH when an odd number of data inputs are HIGH. Expansion to larger word sizes is accomplished by tying the even outputs (∑E) of up to nine parallel devices to the data inputs of the final stage. For a single-chip 16-bit even/odd parity generator/checker, see PC74HC/HCT7080.APPLICATIONS
● 25-line parity generator/checker● 81-line parity generator/checker TYPICAL SYMBOL PARAMETER tPHL/ tPLH propagation delay In to ∑E In to ∑O CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD =...
