Philips 74HCT354
The 74HC/HCT354 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT354 (LSTTL). They are specified in compliance with JEDEC standard no. The 74HC/HCT354 data selectors/multiplexers contain full on-chip binary decoding, to select one-of-eight data sources.FEATURES
● Transparent data latches● Transparent address latch
● Easily expanding
● Complementary outputs
● Output capability: bus driver
● ICC category: MSI
GENERAL DESCRIPTION
7A. The data select address is stored in transparent latches that are enabled by a LOW on the latch enable input (LE). The transparent 8-bit data latches are enabled when the active LOW data enable input (E) is LOW. When the output enable input OE1 = HIGH, OE2 = HIGH or OE3 = LOW, the outputs go to the high impedance OFF-state. Operation of these output enable inputs does not affect the state of the latches. TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay Dn, E to Y, Y Sn, LE to Y, Y CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to V...