Philips 74HCT356
The 74HC/HCT356 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL 74HC/HCT356 (LSTTL). They are specified in compliance with JEDEC standard no. The 74HC/HCT356 data selectors/multiplexers contain full on-chip binary decoding, to select one-of-eight data sources.FEATURES
● Non-transparent data latches● Transparent address latch
● Easily expanding
● Complementary outputs
● Output capability: bus driver
● ICC category: MSI
GENERAL DESCRIPTION
7A. The data select address is stored in transparent latches that are enabled by a LOW on the latch enable input LE. Data on the 8 input lines (D0 to D7) is clocked into a edge-triggered data register by a LOW-to-HIGH transition of the clock (CP). When the output enable input OE1 = HIGH, OE2 = HIGH or OE3 = LOW, the outputs go to the high impedance OFF-state. Operation of these output enable inputs does not affect the state of the latches and register. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay Sn, LE to Y, Y CP to Y, Y CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2.