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74HCT40103 Datasheet PDF

Philips 74HCT40103

The 74HC/HCT40103 are high-speed Si-gate CMOS devices and are pin compatible with the “40103” of the “4000B” series. They are specified in compliance with JEDEC standard no. The 74HC/HCT40103 consist each of an 8-bit synchronous down counter with a single output which is active when the internal count is zero.
Part No. 74HCT40103
Datasheet 74HCT40103 Download
Manufacturer
Philips
Description 8-bit synchronous binary down counter
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74HCT40103 datasheet page 1 preview

FEATURES

● Cascadable
● Synchronous or asynchronous preset
● Output capability: standard
● ICC category: MSI

GENERAL DESCRIPTION

7A. The “40103” contains a single 8-bit binary counter and has control inputs for enabling or disabling the clock (CP), for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the terminal count output (TC) are active-LOW logic. In normal operation, the counter is decremented by one count on each positive-going transition of the clock (CP). Counting is inhibited when the terminal enable input (TE) is HIGH. The terminal count output (TC) goes LOW when the count reaches zero if TE is LOW, and remains LOW for one full clock period. When the synchronous preset enable input (PE) is LOW, data at the jam input (P0 to P7) is clocked into the counter on the next positive-going clock transition regardless of the state of TE. When the asynchronous preset enable input (PL) is LOW, data at the jam input (P0 to P7) is asynchronously forced into the counter regardless of the state of PE, TE, or CP.
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