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74HCT7273 Datasheet PDF

Philips 74HCT7273

The 74HCT7273 is a high-speed SI-gate CMOS device and is pin compatible with Low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no 7A. The 74HCT7273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs.
Part No. 74HCT7273
Datasheet 74HCT7273 Download
Manufacturer
Philips
Description Octal D-type flip-flop
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74HCT7273 datasheet page 1 preview

FEATURES

● ESD protection: HBM EIA/JESD22-A114-A Exceeds 2000 V MM EIA/JESD22-A115-A Exceeds 200 V
● Ideal buffer for MOS microprocessor or memory
● Eight positive edge-triggered D-type flip-flops
● Common clock and master reset
● Output capability: standard (open drain)
● ICC category: MSI.

DESCRIPTION

74HCT7273 The common Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. A LOW level on the MR input forces all outputs LOW, independently of the clock or data inputs. The device is useful for applications requiring true outputs only and clock and master reset inputs that are common to all storage elements. The 74HCT7273 has open-drain N-outputs, which are clamped by a diode connected to VCC. When a HIGH is clocked in the flip-flop, the output comes in the high-impedance OFF-state. The output may now be pulled to any voltage between GND and VOmax.
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