Philips 74HCT7597
The 74HC/HCT7597 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. When LE is LOW, data at the Dn inputs enter the latches.| Part No. | 74HCT7597 |
|---|---|
| Datasheet | 74HCT7597 Download |
| Manufacturer |  Philips |
| Description | 8-bit shift register |
| Buy | Stock & Price |
FEATURES
● 8-bit parallel input latches● Shift register has direct overriding load and clear
● Output capability: standard
● ICC category: MSI
GENERAL DESCRIPTION
7A. 74HC/HCT7597 The 74HC/HCT7597 both consist of an 8-bit storage latch feeding a parallel-in, serial-out 8-bit shift register. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes. When LE is HIGH the latches store the information that was present at the D-inputs, a set-up time preceding the LOW-to-HIGH transition of LE. The shift register has a positive edge-triggered clock, direct load (from storage) and clear inputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay SHCP to Q LE to Q PL to Q D7 to Q fmax CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF; VCC = supply voltage in V 2.
