74HCT9015 Datasheet | Philips Semiconductors

INTEGRATED CIRCUITS DATA SHEET For a plete data sheet, please also download: - The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications - The IC06 74HC/HCT/HCU/HCMOS Logic Package Information - The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT9015 Nine wide Schmitt trigger buffer/line driver Product specification Supersedes data of March 1988 File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver Features - Schmitt trigger action on all data inputs - Output capability: standard - ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT9015 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT9015 The 74HC/HCT9015 are nine wide Schmitt trigger buffer/line drivers with Schmitt trigger inputs. These inputs transform slowly changing input signals into sharply defined jitter-free output signals. The “9015” is identical to the “9014” but has non-inverting inputs. TYPICAL SYMBOL t PHL/ t PLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in p F VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay An to Yn input capacitance power dissipation capacitance per buffer notes 1 and 2 CONDITIONS HC CL = 15 p F; VCC = 5 V 12 3.5 30 HCT 13 3.5 32 ns p F p F UNIT December 1990 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer/line driver PIN DESCRIPTION PIN NO. 1, 2, 3, 4, 5, 6, 7, 8, 9 10 19, 18, 17, 16, 15, 14, 13, 12,...