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74LV125 - Quad buffer/line driver

General Description

The 74LV125 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT125.

The 74LV125 consists of four non-inverting buffers/line drivers with 3-state outputs.

The 3-state outputs (nY) are controlled by the output enable input (nOE).

Key Features

  • Wide operating voltage: 1.0 to 5.5 V.
  • Optimized for Low Voltage.

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Other Datasheets by Philips Semiconductors (now NXP Semiconductors)

Part Number Description
74LV123 Dual retriggerable monostable multivibrator
74LV126 Quad buffer/line driver
74LV10 Triple 3-input NAND gate
74LV107 Dual JK flip-flop
74LV109 Dual JK flip-flop

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS 74LV125 Quad buffer/line driver (3-State) Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 28 Philips Semiconductors Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 FEATURES • Wide operating voltage: 1.0 to 5.5 V • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, • Output capability: bus driver • ICC category: MSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA to nY Input capacitance Power dissipation capacitance per buffer Tamb = 25°C.