Philips 74LV165
The 74LV165 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT165. The 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously.| Part No. | 74LV165 |
|---|---|
| Datasheet | 74LV165 Download |
| Manufacturer |  Philips |
| Description | 8-bit parallel-in/serial-out shift register |
| Buy | Stock & Price |
FEATURES
● Wide operating voltage: 1.0 to 5.5 V● Optimized for low voltage applications: 1.0 to 3.6 V
● Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
● Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,
● Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V,
● Asynchronous 8-bit parallel load
● Synchronous serial input
● Output capability: standard
● ICC category: MSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL tPHL/tPLH fmax CI CPD PARAMETER Propagation delay CE, CP to Q7, Q7 PL to Q7, Q7 D7 to Q7, Q7 Maximum clock frequency Input capacitance Power dissipation capacitance per gate Tamb = 25°C Tamb = 25°C
DESCRIPTION
When PL is HIGH, data enters the register serially at the DS input and shifts one place to the right (Q0→Q1→Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the succeeding stage. The clock input is a gated-OR structure which allows one input to be used as an active LOW clock enable (CE) input.
