Philips 74LV368
The 74LV368 a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT368. The 74LV368 is a hex inverting buffer/line driver with 3–state outputs. The 3–state outputs (nY) are controlled by the output enable inputs 1OE and 2OE.| Part No. | 74LV368 |
|---|---|
| Datasheet | 74LV368 Download |
| Manufacturer |  Philips |
| Description | Hex buffer/line driver |
| Buy | Stock & Price |
FEATURES
● Optimized for Low Voltage applications: 1.0 to 3.6V● Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
● Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V,
● Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V,
● Inverting outputs
● Output capability: bus driver
● ICC category: SSI QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr =tf v2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA to nY Input capacitance Power dissipation capacitance per buffer Tamb = 25°C Tamb = 25°C
DESCRIPTION
A HIGH on nOE causes the outputs to assume a high impedance OFF–state. CONDITIONS CL = 15pF VCC = 3.3V Notes 1, 2 TYPICAL 9.0 3.5 30 UNIT ns pF pF NOTES: 1 CPD is used to determine the dynamic power dissipation (PD in µW) VCC2 x fi )S (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; VCC2 fo) = sum of the outputs. S (CL 2 The condition is VI = GND to VCC ORDERING INFOR...
