Philips 74LVC02
The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environment. The 74LVC02A provides the 2-input NOR function.| Part No. | 74LVC02 |
|---|---|
| Datasheet | 74LVC02 Download |
| Manufacturer |  Philips |
| Description | Quad 2-input NOR gate |
| Buy | Stock & Price |
FEATURES
● Wide supply range of 1.2V to 3.6V● Complies with JEDEC standard no. 8-1A
● Inputs accept voltages up to 5.5V
● CMOS low power consumption
● Direct interface with TTL levels
● 5-volt tolerant inputs, for interfacing with 5-volt logic QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf v2.5 ns SYMBOL tPHL tPLH CI CPD PARAMETER Propagation delay nA, nB to nY Input capacitance Power dissipation capacitance per gate
DESCRIPTION
Inputs can be driven from either 3.3 V or 5 V devices. The 74LVC02A provides the 2-input NOR function. CONDITIONS CL = 50 pF; VCC = 3.3 V Notes 1 and 2 TYPICAL 2.8 5.0 28 UNIT ns pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; ȍ (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION PACKAGES 14-Pin Plastic SO 14-Pin...
