PMBF170 Datasheet | Philips Semiconductors

DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT23 envelope. Designed for use as a Surface Mounted Device (SMD) in thin and thick-film circuits with applications in relay, high-speed and line transformer drivers. FEATURES - Direct interface to C-MOS, TTL, etc. - High-speed switching - No secondary breakdown QUICK REFERENCE DATA Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source on-resistance ID = 200 m A; VGS = 10 V Transfer admittance ID = 200 m A; VDS = 10 V PINNING - SOT23 1 2 3 = gate = source = drain VDS ± VGSO ID Ptot RDS(on) | Yfs| max. max. max. max. typ. max. min. typ. 60 V 20 V 250 m A 300 m W 2.5 Ω 5.0 Ω 100 m S 200 m S Marking code: PMBF170 = PKX PIN CONFIGURATION handbook, halfpage 3 handbook, 2 columns d g 1 Top view 2 MSB003 MBB076 - 1 s Fig.1 Simplified outline and symbol. April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Drain current (peak) Total power dissipation up to Tamb = 25 °C (note 1) Storage temperature range Junction temperature THERMAL RESISTANCE From junction to ambient (note 1) From junction to ambient (note 2) Notes 1. Mounted on ceramic substrate measuring 10 mm × 8 mm × 0.7 mm. 2. Mounted on printed-circuit board. Rth j-a Rth j-a = = VDS ± VGSO ID IDM Ptot Tstg Tj max. max. max. max. max. max. max. 60 V 20 V 250 m A 500 m A 300 m W (note 1) 250 m W (note 2) 150 °C - 65 to +150 °C 430 K/W 500 K/W April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor CHARACTERISTICS Tj = 25 °C unless otherwise specified Drain-source breakdown voltage ID = 10 µA; VGS = 0 Drain-source leakage current VDS = 25 V; VGS = 0 VDS = 48 V; VGS = 0 Gate-source leakage...