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PR31500ABC - Poseidon embedded processor

General Description

PR31500 Processor is a single-chip, low-cost, integrated embedded processor consisting of MIPS R3000 core and system support logic to interface with various types of devices.

Key Features

  • 32-bit R3000 RISC static CMOS CPU.
  • 4 KByte instruction cache.
  • 1 KByte data cache.
  • Multiply/accumulator Instruction.
  • R3000A memory management unit with on-chip TLB.
  • Supports Big/Little Endian operating systems.
  • On-chip peripherals with individual power-down.
  • Multi-channel DMA controller.
  • Bus interface unit.
  • Memory controller for ROM, Flash, RAM, DRAM, SDRAM, SRAM, and PCMCIA.
  • Power management modu.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS MIPS PR31500 Poseidon embedded processor Preliminary specification Version 0.1 1996 Sep 24 Philips Semiconductors Philips Semiconductors Preliminary specification Poseidon embedded processor Version 0.1 GENERAL DESCRIPTION PR31500 Processor is a single-chip, low-cost, integrated embedded processor consisting of MIPS R3000 core and system support logic to interface with various types of devices. PR31500 consists of a MIPS R3000 RISC CPU with 4 KBytes of instruction cache memory and 1 KByte of data cache memory, plus integrated functions for interfacing to numerous system components and external I/O modules.