SA8028 Datasheet | Philips Semiconductors

INTEGRATED CIRCUITS 2.5 GHz sigma delta fractional-N / 760 MHz IF integer frequency synthesizers Product data Supersedes data of 2002 Jan 09 File under Integrated Circuits - IC17 2002 Feb 22 Philips Semiconductors Philips Semiconductors Product data 2.5 GHz sigma delta fractional-N / 760 MHz IF integer frequency synthesizers GENERAL DESCRIPTION The SA8028 BICMOS device integrates programmable dividers, charge pumps and phase parators to implement phase- locked loops. The device is designed to operate from 3 Ni Cd cells, in pocket phones, with low current and nominal 3 V supplies. The synthesizer operates at VCO input frequencies up to 2.5 GHz. The synthesizer has fully programmable RF, IF, and reference dividers. All divider ratios are supplied via a 3-wire serial programming bus. The RF divider is a fractional-N divider with programmable integer ratios from 33 to 509 and a fractional resolution of 22 programmable bits (23 bits internal). A 2nd order sigma-delta modulator is used to achieve fractional division. Separate power and ground pins are provided to the charge pumps and digital circuits. VDDCP must be equal to or greater than VDD. The ground pins should be externally connected to prevent large currents from flowing across the die and thus causing damage. The charge pump current (gain) is fully programmable, while ISET is set by an external resistance at the RSET pin (refer to section 1.5, RF and IF Charge Pumps). The phase/frequency detector charge pump outputs allow for implementing a passive loop filter. APPLICATIONS - 500 to 2500 MHz wireless equipment - Cellular phones, all standards including: CDMA 3G GSM TDMA GAIT : IS95-B,C WCDMA : WCDMA / UMTS : EDGE / GPRS : IS136 and EDGE : GSM and TDMA - - - - WLAN Wireless PDAs Satellite tuners and all other high frequency equipment Extreme fine frequency resolution applications STROBE 20 LOCK TEST VDDPre 1 2 3 4 5 6 7 PHP V DD 19 18 17 CLOCK REFin+ REFin- RSET...