Pixelplus PC1030N
NTSC/PAL CMOS Image Sensor
FEATURES
- [ Fig. 1 ] PINDESCRIPTION
- [ Table 1 ] Typical Parameters ▶ Pin Descriptions - [ Table 2 ] Pin Descriptions ▶ Signal Environment ▶ Chip Architecture - [ Fig. 2 ] Block Diagram ▶ Frame Structure and Windowing - [ Fig. 3 ] Default data structure of frame and window ▶ Data Formats - [ Fig. 4 ] Bayer Color Filter Pattern - [ Fig. 5 ] 4:2:2 YUV data sequence. ▶ Data and Synchronization Timing (1) ITU-R BT656 - [ Fig. 6 ] Timing diagram of ITU-R BT601 and ITU-R BT656. - [ Fig. 7 ] Vertical Timing diagram of ITU-R of ITU-R BT656. (2) 320x240 (320x288) Digital Output - [ Fig. 8 ] Timing diagram for Hsync, MCLK, PCLK and Data - [ Fig. 9 ] Timing diagram for Vsync and Hsync. (3) 640x480 VGA Digital Output Only - [Fig.10] Timing diagram for Hsync, MCLK, PCLK and Data ( Default : YUV ) - [Fig.11] Timing diagram for Hsync, MCLK, PCLK and Data ( Bayer ) - [Fig.12] Timing diagram for Vsync and Hsync ▶ NTSC/PAL wire-strapping - [Fig 13] Example of wire-strapping - [Table 3] wire-strapping...