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PCS3P625Z05C Datasheet Low Frequency Timing-safe Peak Emi Reduction Ic

Manufacturer: PulseCore Semiconductor

Overview: May 2008 rev 0.1 PCS3P625Z05B/C PCS3P625Z09B/C High Frequency Timing-Safe™ Peak EMI reduction IC www.DataSheet4U.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

PCS3P625Z05/09 is a versatile, 3.3V Zero-delay buffer designed to distribute high frequency Timing-Safe™ clocks memory interface systems.

General Block Diagram PLL CLKIN DLY_CTRL CLKOUT1 CLKOUT2 CLKOUT3 CLKIN PLL MUX DLY_CTRL CLKOUTA1 CLKOUTA2 CLKOUTA3 CLKOUTA4 PCS3P625Z05B/C CLKOUT4 S2 S1 Select Input Decoding CLKOUTB1 CLKOUTB2 CLKOUTB3 PCS3P625Z05B/C CLKOUTB4 PulseCore Semiconductor Corporation 1715 S.

Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice.

Key Features

  • High Frequency Clock distribution with TimingSafe™ Peak EMI Reduction Input frequency range: 100MHz - 175MHz Multiple low skew Timing-safe™ Outputs: PCS3P625Z05: 5 Outputs PCS3P625Z09: 9 Outputs.
  • External Input-Output Delay Control option Supply Voltage: 3.3V±0.3V Commercial and Industrial temperature range Packaging Information: ASM3P625Z05: 8 pin SOIC, and TSSOP ASM3P625Z09:16 pin SOIC, and TSSOP.
  • True Drop-in Soluti.

PCS3P625Z05C Distributor

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