P25C16H Datasheet | Puya Semiconductor

Description The P25C16H is Serial Peripheral Interface (SPI) patible EEPROM (Electrically Erasable Programmable Memory) device. It contains a memory array of 16 Kbits (2 Kbytes), which is organized in 32 bytes per page. Features - Single supply voltage: 1.7 V to 5.5 V - Max clock frequency: - 15 MHz clock from 4.5 V to 5.5 V - 5 MHz clock from 1.7 V to 5.5 V - Serial Peripheral Interface (SPI) patible - Standard SPI: C, S#, D, Q, W#, HOLD# - Mode 0 and Mode 3 - Memory array - 16 Kbits of EEPROM - Page size: 32 bytes - Write - Byte/Page Write within 5 ms - Additional Write lockable page (Identification Page) - Additional 128 bits Serial Number (Unique ID) - Hardware Controlled Locking of Protected Sectors by WP Pin - Transparent ECC on each group of four bytes which can correct 1 bit error - High Reliability - Endurance: 4 Million Write Cycles - Data Retention: 200 Years - HBM: 6 k V - Latch up Capability: +/- 200 m A(25 C) - Package: PDIP8,SOP8 (150mil/208mil),TSSOP8,MSOP8,DFN8,UDFN8 1/37 1. Pin Configuration 1.1 Pin Configuration P25C16H Datasheet V1.5 S# 1 8 Vcc 2 7 HOLD# W# 3 6 C Vss 4 5 D PDIP8/SOP8 (150mil/208mil)/TSSOP8/MSOP8/DFN8/UDFN8 1.2 Pin...