P25D32SH Datasheet | Puya Semiconductor

Overview General - Single 2.3V to 3.60V supply - Industrial Temperature Range -40C to 85C - Serial Peripheral Interface (SPI) patible: Mode 0 and Mode 3 - Single, Dual, SPI, DTR - Standard SPI: SCLK,CS#,SI,SO,WP#,HOLD# - Dual SPI: SCLK,CS#,IO0,IO1,WP#, HOLD# - DTR: Double Transfer Rate Read - Flexible Architecture for Code and Data Storage - Uniform 256-byte Page Program - Uniform 256/512/1024-byte Page Erase - Uniform 4K-byte Sector Erase - Uniform 32K/64K-byte Block Erase - Full Chip Erase - Hardware Controlled Locking of Protected Sectors by WP# Pin - One Time Programmable (OTP) Security Register - 3- 1024-Byte Security Registers With OTP Lock - 128 bit unique ID for each device - Fast Program and Erase Speed - 1.6ms Single/Dual Page(s) program time - 16ms Page erase time - 16ms 4K-byte sector erase time - 16ms 32K/64K-byte block erase time - JEDEC Standard Manufacturer and Device ID Read Methodology - Ultra Low Power Consumption - 0.3u A Deep Power Down current - 10.0u A Standby current - 7.5m A Active Read current at 85MHz - 3.0m A Active Program or Erase current - High Reliability - 100,000 Program / Erase Cycles - 20-year Data Retention - Industry Standard Green Package Options - 8-pin SOP (150mil/208mil)...