P25Q06H Datasheet | Puya Semiconductor

Overview General - Single 2.3V to 3.60V supply - Industrial Temperature Range -40C to 85C - Serial Peripheral Interface (SPI) patible: Mode 0 and Mode 3 - Single, Dual and Quad IO mode - 2M/1M/512K x 1 bit - 1M/512K/256K x 2 bits - 512K/256K/128K x 4 bits - Flexible Architecture for Code and Data Storage - Uniform 256-byte Page Program - Uniform 256-byte Page Erase - Uniform 4K-byte Sector Erase - Uniform 32K/64K-byte Block Erase - Full Chip Erase - Hardware Controlled Locking of Protected Sectors by WP# Pin - One Time Programmable (OTP) Security Register - 3- 512-Byte Security Registers With OTP Lock - 128 bit unique ID for each device - Fast Program and Erase Speed - 2ms Page program time - 8ms Page erase time - 8ms 4K-byte sector erase time - 8ms 32K-byte block erase time - 8ms 64K-byte block erase time - JEDEC Standard Manufacturer and Device ID Read Methodology - Ultra Low Power Consumption - 0.3u A Deep Power Down current - 9u A Standby current - 0.5m A Active Read current at 33MHz - 1.5m A Active Program or Erase current - High Reliability - 100,000 Program / Erase Cycles - 20-year Data Retention - Industry Standard Green Package Options - 8-Lead SOP (150mil) - 8-Lead...