PY25F64HA
Overview
General
- Single 2.7 to 3.6V supply
- Serial Peripheral Interface (SPI) patible: Mode 0 and Mode 3
- Single, Dual, Quad SPI, QPI, DTR
- Standard SPI: SCLK, CS#, SI, SO
- Dual SPI:
SCLK, CS#, IO0, IO1
- Quad SPI:
SCLK, CS#, IO0, IO1, IO2, IO3
- QPI:
SCLK, CS#, IO0, IO1, IO2, IO3
- DTR:
Double Transfer Rate Read
- Flexible Architecture for Code and Data Storage
- Uniform 256-byte
Page Program
- Uniform 4K-byte
Sector Erase
- Uniform 32K/64K-byte Block Erase
- Full Chip Erase
- One Time Programmable (OTP) Security Register
- 3- 1024-Byte Security Registers with OTP Lock
- 128-bit Unique ID for each device
- Fast Program and Erase Speed Typical
- 0.5ms Page program time
- 50ms 4K-byte sector erase time
- 0.15s 32K-byte block erase time
- 0.30s 64K-byte block erase time
- JEDEC Standard Manufacturer and Device ID Read Methodology
- Low Power Consumption Typical
- 1.0u A Deep Power Down current
- 18u A Standby current
- 6m A Active Read current at 85MHz 4IO
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