HYB25DC512160BE Datasheet | Qimonda

atures of the product family HYB25DC512[80/16]0B[E/F] and the ordering information. Double data rate architecture: two data transfers per clock cycle Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver DQS is edge-aligned with data for reads and is center-aligned with data for writes Differential clock inputs (CK and CK) Four internal banks for concurrent operation Data mask (DM) for write data DLL aligns DQ and DQS transitions with CK transitions mands entered on each positive CK edge; data and data mask referenced to both edges of DQS Burst Lengths: 2, 4, or 8 CAS Latency: 1.5 (DDR200 only), 2, 2.5, 3 Auto Precharge option for each burst access Auto Refresh and Self Refresh Modes RAS-lockout supported t RAP = t RCD 7.8 µs Maximum Average Periodic Refresh Interval 2.5 V (SSTL_2 patible) I/O VDDQ = 2.5 V ± 0.2 V (DDR200, DDR266, DDR333); VDDQ = 2.6 V ± 0.1 V (DDR400B) VDD = 2.5 V ± 0.2 V (DDR200, DDR266, DDR333); VDD = 2.6 V ± 0.1 V (DDR400B) Standard Temperature Range (0 °C - +70 °C) PG-TSOPII-66 and PG-TFBGA-60 packages Ro HS1) pliant product types available (green product) TABLE 1 Performance Product Type Speed Code Speed Grade Max. Clock Frequency ponent @CL3 @CL2.5 @CL2 - 5 DDR400B - 6 DDR333 166 166 133 Unit - MHz MHz MHz f CK3 f CK2.5 f CK2 200 166 133 1) Ro HS pliant Product: Restriction of the use of certain hazardous substances (Ro HS) in electrical and electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. Rev. 1.2, 2007-04 04112007-FHBX-O8HD .. Internet Data Sheet HYB25DC512[80/16]0B[E/F] Double-Data-Rate SDRAM Description The 512-Mbit Double-Data-Rate SDRAM is...