HYS64T32900 Datasheet | Qimonda

Overview This chapter gives an overview of the 240-Pin unbuffered DDR2 SDRAM Modules product family and describes its main characteristics. Features - - - - - - - - - - Auto Refresh (CBR) and Self Refresh Programmable self refresh rate via EMRS2 setting Programmable partial array refresh via EMRS2 settings DCC enabling via EMRS2 setting All inputs and outputs SSTL_1.8 patible Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT) Serial Presence Detect with E2PROM UDIMM Dimensions (nominal): 30 mm high and 133.35 mm wide Based on standard reference layouts Raw Card “C” “D”, “E”, “F” and “G” Ro HS pliant products1) Feature list and performance tables - 240-Pin PC2- 6400, PC2- 5300 and PC2- 4200 DDR2 SDRAM memory modules. - Module organization 32M × 64, 64M × 64, 64M × 72, 128M × 64 and 128M × 72. Chip organization 32M × 16 and 64M × 8. - Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply - 256MB, 512MB and 1GB modules built with 512-Mbit DDR2 SDRAMs in P-TFBGA-60 and PG-TFBGA-84 chipsize packages - All speed grades faster than DDR2- 400 ply with DDR400 timing specifications. - Programmable CAS Latencies (3, 4, 5 and 6), Burst Length (8 & 4) and Burst Type TABLE 1 Performance Table Product Type Speed Code Speed Grade Max. Clock Frequency @CL6 @CL5 @CL4 @CL3 Min. RAS-CAS-Delay Min. Row Precharge Time Min. Row Active Time Min. Row Cycle Time - 25F PC2- 6400 5- 5- 5 - 2.5 PC2- 6400 6- 6- 6 400 333 266 200 15 15 45 60 - 3 PC2- 5300 4- 4- 4 - 333 333 200 12 12 45 57 - 3S PC2-...