Description
This SiC FET device is based on a unique ‘cascode’ circuit configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device.
Features
- Marking UHB100SC12E1BC3N
w On-resistance: RDS(on) = 9.4mW (typ) w Operating temperature: 150°C (max) w Excellent reverse recovery: Qrr = 1000nC w Low body diode voltage: VFSD = 1.4V w Low gate charge: QG = 170nC w Threshold voltage VG(th): 5V (typ) allowing 0 to 15V drive w Low intrinsic capacitance w ESD protected: HBM class 2 and CDM class C3
Typical.
UHB100SC12E1BC3N Datasheet
