QL4009 Datasheet | QuickLogic

- Quick RAMTM 9,000 Usable PLD Gate Quick RAM ESP bining Performance, Density, and Embedded RAM - Quick RAM DEVICE HIGHLIGHTS Device Highlights High Performance & High Density s s 9,000 Usable PLD Gates with 82 I/Os 300 MHz 16-bit Counters, 400 MHz Datapaths, 160+ MHz FIFOs 0.35µm four-layer metal non-volatile CMOS process for smallest die sizes 8 RAM Blocks } 160 High Speed Logic Cells Interface s High Speed Embedded SRAM s FIGURE 1. Quick RAM Block Diagram 8 dual-port RAM modules, organized in user-configurable 1,152 bit blocks 5ns access times, each port independently accessible Fast and effecient for FIFO, RAM, and ROM functions ARCHITECTURE OVERVIEW The Quick RAM family of ESPs (Embedded Standard Products) offers FPGA logic in bination with Dual Port SRAM modules. The QL4009 is a 9,000 usable PLD gate member of the Quick RAM family of ESPs. Quick RAM ESPs are fabricated on a 0.35mm fourlayer metal process using Quick Logic’s patented Via Link TM technology to provide a unique bination of high performance, high density, low cost, and extreme ease-of-use. The QL4009 contains 160 logic cells and 8 dual port RAM modules (see Figure 1). Each RAM module has 1,152 RAM bits, for a total of 9,216 bits. RAM Modules are Dual Port (one read port, one write port) and can be configured into one of four modes: 64 (deep) x18 (wide), 128x9, 256x4, or 512x2 (see Figure 2). With a maximum of 82 I/Os, the QL4009 is available in 68-pin PLCC, 84-pin PLCC, and 100-pin TQFP packages. Designers can cascade multiple RAM modules to increase the depth or width allowed in single modules by connecting corresponding address lines together and dividing the words between modules (see Figure 3). This approach allows up to 512-deep configurations as large as 16 bits wide in the smallest Quick RAM device and 44 bits wide in the largest device. s s Easy to Use / Fast Development Cycles s 100% routable with 100% utilization and plete pin-out stability Variable-grain...