R8830 Datasheet | RDC Semiconductor

Features l CPU Core .. RISC DSP munication 16-BIT RISC MICROCONTROLLER - proprietary RISC architecture - Five-stage pipeline - CPU Clock speed up to 40 MHz - Supports CPU ID - Supports 32 PIO pins l Bus interface - Multiplexed address and data bus which is patible with the 80C188 microprocessor - Supports a non-multiplexed address bus A[19:0] l ROM/RAM Controller and Addressing Space - 1M-byte memory address space - 64K-byte I/O space l PSRAM Interface - PSRAM (Pseudo Static RAM) interface with auto-refresh control l patible UART Channels - UART speed : maximum baud rate up to 115.2Kbps l Two Independent DMA Channels - Supports serial ports with DMA transfers l Asynchronous Serial Channels - Supports two asynchronous serial channels with hardware handshaking signals l Interrupt Controller - The Interrupt controller with seven maskable external interrupts and one non-maskable external interrupt l Programmable Chip-select Logic - Programmable chip-select logic for memory or I/O bus cycle decoder l l Programmable Wait-state Generator Counter/Timers - Three independent 16-bit timers and one independent watchdog timer l Software patible with the 80C186 Microprocessor l Operating Voltage Range - Core voltage: 5V ± 10% - I/O voltage: 5V ± 10% l l l Ambient temperature: 0 ~ +70°C Power Save and Power Down Mode Support Package Type -100 Pin PQFP & 100 Pin LQFP Specifications subject to change without notice, contact your sales representatives for the most update information. Page 2 of 5 REV 1.0 Aug.07 2006 RDC® .. RISC DSP munication 16-BIT RISC MICROCONTROLLER 2. Block Diagram INT2/INTA0_n INT1/SELECT_n CLKOUTA INT3/INTA1_n/IRQ CLKOUTB INT6~4 INT0 NMI TMROUT0 TMROUT1 TMRIN0 TMRIN1 DRQ0 DRQ1 X1 VCC GND X2 Clock and Power Management Interrupt Control Unit Timer Control...