Datasheet4U Logo Datasheet4U.com

VRS51L1050 - Versa 3.3 Volt 8051 MCU

General Description

The VRS51L1050 is based on the standard 8051 microcontroller architecture and is a pin compatible drop-in replacement for most 8051 MCUs.

Key Features

  • 64KB of In-System/In-.

📥 Download Datasheet

Datasheet Details

Part number VRS51L1050
Manufacturer Ramtron
File Size 89.94 KB
Description Versa 3.3 Volt 8051 MCU
Datasheet download datasheet VRS51L1050 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
VRS51L3074 FRAM-enhanced high performance 8051-based microcontroller coupled Ramtron Corporation
VRS51L3174 FRAM-Enhanced High Performance 8051 MCU Ramtron Corporation
VRS550 (VRS550 / VRS560) Flash / MCU Goal
VRS560 (VRS550 / VRS560) Flash / MCU Goal
VRS0402 SURFACE-MOUNT CERAMIC MULTILAYER CHIP VARISTORS YAGEO

Other Datasheets by Ramtron

Part Number Description
VRS51L540 Versa 8051 MCU
VRS51L550 (VRS51X550 / VRS51X560) Versa 8051 MCUs
VRS51L560 (VRS51X550 / VRS51X560) Versa 8051 MCUs
VRS51L570 (VRS51X570 / VRS51X580) Versa 8051 MCUs
VRS51L580 (VRS51X570 / VRS51X580) Versa 8051 MCUs

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com VRS51L1050 Product Tech Brief Rev 1.0 Versa 3.3 Volt 8051 MCU with 64KB of IAP/ISP Flash General Description _________________ The VRS51L1050 is based on the standard 8051 microcontroller architecture and is a pin compatible drop-in replacement for most 8051 MCUs. The VRS51L1050 is designed for applications that require a large amount of program/data memory with non-volatile data storage and/or code/field based firmware upgrade capability coupled with comprehensive peripheral support. It features 64KB of In-System/In-Application Programmable Flash, 1KB of SRAM, an I2C-compatible interface, three 16-bit timers, two PWMs, a UART and the capability to exit power down mode from an external interrupt (INT0/INT1).