Raspberry Pi RP2350
RP2350 is a new family of microcontrollers from Raspberry Pi that offers major enhancements over RP2040. Key features include: • Dual Cortex-M33 or Hazard3 processors at 150 MHz • 520 kB on-chip SRAM, in 10 independent banks • 8 kB of one-time-programmable storage (OTP) • Up to 16 MB of external QSPI flash or PSRAM through dedicated QSPI bus • Additional 16 MB flash or PSRAM through optional second...| Part No. | RP2350 |
|---|---|
| Datasheet | RP2350 Download |
| Manufacturer | Raspberry Pi |
| Description | Microcontroller |
| Buy | Stock & Price |
RP2350 Datasheet Chapter 1. Introduction Table 1. RP2350 device family Key features include:
● Dual Cortex-M33 or Hazard3 processors at 150 MHz
● 520 kB on-chip SRAM, in 10 independent banks
● 8 kB of one-time-programmable storage (OTP)
● Up to 16 MB of external QSPI flash or PSRAM through dedicated QSPI bus
● Additional 16 MB flash or PSRAM through optional second chip-select
● On-chip switched-mode power supply to generate core voltage
● Optional low-quiescent-current LDO mode for sleep states
● 2 × on-chip PLLs for internal or external clock generation
● GPIOs are 5 V-tolerant (powered) and 3.3 V-failsafe (unpowered)
● Security features: ◦ Optional boot signing, enforced by on-chip mask ROM, with key fingerprint in OTP ◦ Protected OTP storage for optional boot decryption key ◦ Global bus filtering based on Arm or RISC-V security/privilege levels ◦ Peripherals, GPIOs, and DMA channels individually assignable to security domains ◦ Hardware mitigations for fault injection attacks ◦ Har...
● Dual Cortex-M33 or Hazard3 processors at 150 MHz
● 520 kB on-chip SRAM, in 10 independent banks
● 8 kB of one-time-programmable storage (OTP)
● Up to 16 MB of external QSPI flash or PSRAM through dedicated QSPI bus
● Additional 16 MB flash or PSRAM through optional second chip-select
● On-chip switched-mode power supply to generate core voltage
● Optional low-quiescent-current LDO mode for sleep states
● 2 × on-chip PLLs for internal or external clock generation
● GPIOs are 5 V-tolerant (powered) and 3.3 V-failsafe (unpowered)
● Security features: ◦ Optional boot signing, enforced by on-chip mask ROM, with key fingerprint in OTP ◦ Protected OTP storage for optional boot decryption key ◦ Global bus filtering based on Arm or RISC-V security/privilege levels ◦ Peripherals, GPIOs, and DMA channels individually assignable to security domains ◦ Hardware mitigations for fault injection attacks ◦ Har...
