FEATURES
RTL8180L l 128-Pin LQFP l Supports descriptor-based buffer management l Patented integrated Wireless LAN MAC and Direct Sequence Spread Spectrum Baseband Processor in one chip l Enhanced Signal Detector l Processing Gain FCC compliance l On-Chip A/D and D/A converters for I/Q Data, AGC, and Adaptive Power Control l Targeted for Multipath Delay Spreads 125ns at 11Mbps l Supports Antenna Diversity l 1 Mbps, 2 Mbps, 5.5 Mbps, and 11 Mbps operation l PCI local bus network interface controller ² Compliant to PCI Revision 2.2 ² Supports PCI clock 16.75MHz-40MHz ² Supports PCI target fast back-to-back transaction ² Supports Memory Read Line, Memory Read Multiple, Memory Write and Invalidate ² Provides PCI bus master data transfers and PCI memory space or I/O space mapped data transfers of RTL8180's operational registers ² Supports PCI VPD (Vital Product Data) ² Supports ACPI, PCI power management l Supports CardBus. The CIS can be stored in a 93C56. l Supports 44MHz OSC as the internal clock source.