RTL8363SB Datasheet PDF

Realtek RTL8363SB

the RTL8363SB supports two extra interfaces that can be configured as GMII/RGMII/MII interfaces. The RTL8363SB integrates all the functions of a high-speed switch system; including SRAM for packet buffering, non-blocking switch fabric, and internal register management into a single CMOS device. The embedded packet storage SRAM in the RTL8363SB features superior memory management technology to efficiently utilize memory space.

Part No.	RTL8363SB
Datasheet	RTL8363SB Download
Manufacturer	Realtek
Description	LAYER 2 MANAGED 2+2-PORT 10/100/1000M SWITCH CONTROLLER
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GENERAL DESCRIPTION

The RTL8363SB-CG is an LQFP128, high-performance 2+2-port 10/100/1000M Ethernet switch. It features low-power integrated dual-port Gigabit PHYs that support 1000Base-T, 100Base-TX, and 10Base-T. For specific applications, Only a 25MHz crystal is required; an optional EEPROM is offered for internal register configuration. The RTL8363SB integrates a 2K-entry look-up table with a 4-way XOR Hashing algorithm for address searching and learning. The table provides read/write access from the EEPROM Serial Management Interface (SMI), Media Independent Interface Management (MIIM), or SPI Interface. Each of the entries can be configured as a static entry. Normal entry aging time is between 200 and 400 seconds. Eight Filtering Databases are used to provide Independent VLAN Learning and Shared VLAN Learning (IVL/SVL) functions. The Extension GMAC0 and Extension GMAC1 of the RTL8363SB implement dual GMII/RGMII/MII interfaces. These interfaces could be connected to an external PHY, MAC, CPU, or RISC for specific applications.