GENERAL DESCRIPTION
The RTL8367RB integrate all the functions of a high-speed switch system; including SRAM for packet buffering, non-blocking switch fabric, and internal register management into a single CMOS device. Only a 25MHz crystal is required; an optional EEPROM is offered for internal register configuration. The embedded packet storage SRAM in the RTL8367RB features superior memory management technology to efficiently utilize memory space. The RTL8367RB integrates a 2K-entry look-up table with a 4-way XOR Hashing algorithm for address searching and learning. The table provides read/write access from the EEPROM Serial Management Interface (SMI), MII Management Interface (MIIM), or SPI Interface. And each of the entries can be configured as a static entry. The entry aging time is between 200 and 400 seconds. Eight Filtering Databases are used to provide Independent VLAN Learning and Shared VLAN Learning (IVL/SVL) functions. The Extension GMAC1 and Extension GMAC2 of the RTL8367RB implement dual RGMII/MII interfaces.
Realtek
