HD49338HF Datasheet | Renesas

Description The HD49338F/HF is a CMOS IC that provides CDS-PGA analog processing (CDS/PGA) suitable for CCD camera digital signal processing systems together with a 12-bit A/D converter in a single chip. Functions Correlated double sampling PGA Offset pensation Serial interface control 12-bit ADC Operates using only the 3 V voltage Corresponds to switching mode of power dissipation and operating frequency Power dissipation: 150 m W (Typ), maximum frequency: 36 MHz Power dissipation: 100 m W (Typ), maximum frequency: 25 MHz ADC direct input mode Y-IN direct input mode QFP 48-pin package Features Suppresses low-frequency noise output from CCD by the S/H type correlated double sampling. The S/H response frequency characteristics for the reference level can be adjusted using values of external parts and registers. High sensitivity is achieved due to the high S/N ratio and a wide coverage provided by a PG amplifier. Feedback is used to pensate and reduce the DC offsets including the output DC offset due to PGA gain change and the CCD offset in the CDS (correlated double sampling) amplifier input. PGA, standby mode, etc., is achieved via a serial interface. High precision is provided by a 12-bit-resolution A/D converter. Rev.1.0, Apr 20, 2004, page 1 of 22 HD49338F/HF Pin Arrangement ADCIN AVSS Y IN AVDD BIAS BLKC CDSIN BLKFB BLKSH AVDD AVSS AVSS VRM VRT VRB DVDD DVSS OEB DVDD DVDD DVSS CS SDATA SCK 36 35 34 33 32 31 30 29 28 27 26 25 37 24 38 23 39 22 40 21 41 20 42 19 43 18 44 17 16 45 46 15 47 14 48 13 1 2 3 4 5 6 7 8 9 10 11 12 DVDD (NC) SPSIG SPBLK OBP PBLK DVDD DVDD ADCLK DVSS DVSS DRDVDD Pin Description Pin No. 1 2 to 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Symbol D0 D1 to D10 D11 DRDVDD DVSS DVSS ADCLK DVDD DVDD PBLK OBP SPBLK SPSIG NC DVDD AVSS AVSS AVDD BLKSH BLKFB CDSIN BLKC Description Digital output (LSB) Digital output Digital output (MSB) Output buffer power supply (3 V) Digital ground (0 V) Digital ground (0 V) ADC conversion...