HD74LV2GT240A - Dual Bus Buffer Inverted

Product Overview

Renesas Technology

Datasheet Details

Part number	HD74LV2GT240A
Manufacturer	Renesas Technology
File Size	127.67 KB
Description	Dual Bus Buffer Inverted
Datasheet	HD74LV2GT240A Datasheet
Additional preview pages of the HD74LV2GT240A datasheet.

Product details

Description

The HD74LV2GT240A has dual bus buffer inverted with 3 state output in an 8 pin package. level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to

Features

The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level. Supply voltage range : 3.0 to 5.5 V Operating temperature range :.
40 to +85°C.
Logic-level translate function 3.0 V CMOS logic → 5.0 V CMOS logic (@VCC = 5.0 V) 1.8 V or 2.5 V CMOS logic → 3.3 V CMOS logic (@VCC = 3.3 V).
All inputs VIH (Max. ) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO.

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Published: Jul 3, 2009 |