HD74LV2GT74A Overview
The HD74LV2GT74A has independent data, preset, clear, and clock inputs Q and Q outputs in an 8 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. The input protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a logic level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V...
HD74LV2GT74A Key Features
- The basic gate function is lined up as Renesas uni logic series
- Supplied on emboss taping for high-speed automatic mounting
- TTL patible input level. Supply voltage range : 3.0 to 5.5 V Operating temperature range : -40 to +85°C
- Logic-level translate function 3.0 V CMOS logic → 5.0 V CMOS logic (@VCC = 5.0 V) 1.8 V or 2.5 V CMOS logic → 3.3 V CMOS
- All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
- Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
- All the logical input has hysteresis voltage for the slow transition
- Ordering Information
- HD74LV2GT74A