RNA51958B
RNA51958B is Voltage Detecting a System Resetting IC Series manufactured by Renesas.
- Part of the RNA51958A comparator family.
- Part of the RNA51958A comparator family.
Description
RNA51958A,B are semiconductor integrated circuits for resetting of all types of logic circuits such as CPUs, and has the feature of setting the detection voltage by adding external resistance. They include a built-in delay circuit to provide the desired retardation time simply by adding an external capacitor. They fined extensive applications, including battery checking circuit, level detecting circuit and waveform shaping circuit.
Features
- -
- -
- Few external parts Large delay time with a capacitor of small capacitance (td ≈ 100 ms, at 0.33 µF) Wide supply voltage range: 2 V to 17 V Wide application range Ordering Information
Part Name RNA51958AFPH0 RNA51958BFPH0 Package Type SOP-8 pin SOP-8 pin Package Code PRSP0008DE-C PRSP0008DE-C Package Abbreviation FP FP Taping Abbreviation (Quantity) H (2,500 pcs / Reel) H (2,500 pcs / Reel) Surface Treatment 0 (Ni/Pd/Au) 0 (Ni/Pd/Au)
Application
- Reset circuit of Pch, Nch, CMOS, microputer, CPU and MCU, Reset of logic circuit, Battery check circuit, switching circuit back-up voltage, level detecting circuit, waveform shaping circuit, delay waveform generating circuit, DC/DC converter, over voltage protection circuit
Remended Operating Condition
- Supply voltage range: 2 V to 17 V
Outline and Article Indication
- RNA51958A, B
Type No.
R958A YMWC CCC
SOP-8
R958B YMWC CCC
Pin No.1 Trace Code
Lot No. Y : Year Code (the last digit of year) M : Month Code W : Week Code C : Control Code
REJ03D0915-0100 Rev.1.00 Mar 02, 2009 Page 1 of 11
RNA51958A,B
Pin Arrangement
RNA51958AFP/BFP
..
NC 1 Input 2 NC 3 GND 4 (Top view) NC: No Connection
8 NC 7 Power-supply 6 Output 5 Delay capacitor
Outline: PRSP0008DE-C
Block Diagram
RNA51958A, B Powersupply A: Built-in Load B: Open Collector
5µ A Typ Input
- + 1.25V +
25µA Typ
Output
Delay capacitor
Operating Waveform
RNA51958A, B
Input voltage
1.25V t H td td
Output...