Renesas Electronics 552-02S
The 552-02S is a low skew, single-input to eight- output clock buffer. The device offers a dual input with pin select for switching between two clock sources. It has best in class Additive Phase Jitter of sub 50fsec Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks.| Part No. | 552-02S |
|---|---|
| Datasheet | 552-02S Download |
| Manufacturer |  Renesas Electronics |
| Description | Low Skew 2-input MUX and 1 to 8 Clock Buffer |
| Buy | Stock & Price |
DESCRIPTION
Contact us for all of your clocking needs.FEATURES
● Low RMS Additive Phase Jitter: 50fs● Low output skew: 50ps
● Operating Voltages of 1.8V to 3.3V
● Packaged in 16-pin TSSOP and 16-pin VFQFPN, Pb-free
● Input clock multiplexer simplifies clock selection
● Output Enable pin tri-states outputs
● Input/Output clock frequency up to 200MHz
● Low power CMOS technology
● 3.3V tolerant inputs
● Extended temperature (-40°C to +105°C) Block Diagram Q0 Q1 Q2 INA 1 Q3 INB 0 Q4 Q5 Q6 Q7 SELA OE 552-02S APRIL 9, 2024 1 ©2017-2024 Renesas Electronics Corporation 552-02S DATASHEET Pin Assignments SELA VDD Q7 Q6 OE 1 VDD 2 Q0 3 Q1 4 Q2 5 Q3 6 GND 7 INB 8 16 SELA 15 VDD 14 Q7 13 Q6 12 Q5 11 Q4 10 GND 9 INA OE VDD Q0 Q1 16 15 14 13 1 12 2 11 3 10 4 9 56 78 Q5 Q4 GND INA Q2 Q3 GND INB 16 Pin TSSOP Input Source Select 16-pin VFQFN SELA 0 1 Input INB INA Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name OE VDD Q0 Q1 Q2 Q3 GND INB INA GND Q4 Q5 Q6 Q7 VDD SELA Pin Type Pin
DESCRIPTION
Input Power Output Output Output Output Power Input Input Power Output Output Output Output Power Input Output Enable.
