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557GI06LF - 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

This page provides the datasheet information for the 557GI06LF, a member of the 557G06LF 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX family.

Datasheet Summary

Description

The ICS557-06 is a two to four differential clock mux designed for use in PCI-Express applications.

The device selects one of the two differential HCSL input pairs and fans out to four pairs of differential HCSL or LVDS outputs.

Features

  • Packaged in 20-pin TSSOP.
  • Pb (lead) free packaging.
  • Operating voltage of 3.3 V.
  • Low power consumption.
  • Input differential clock of up to 200 MHz.
  • Jitter 60 ps (cycle-to-cycle).
  • Output-to-output skew of 50 ps.
  • Available in industrial temperature range (-40 to +85°C).
  • For PCIe Gen2/3.

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Datasheet preview – 557GI06LF

Datasheet Details

Part number 557GI06LF
Manufacturer Renesas
File Size 287.74 KB
Description 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX
Datasheet download datasheet 557GI06LF Datasheet
Additional preview pages of the 557GI06LF datasheet.

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Full PDF Text Transcription

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2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX DATASHEET ICS557-06 Description The ICS557-06 is a two to four differential clock mux designed for use in PCI-Express applications. The device selects one of the two differential HCSL input pairs and fans out to four pairs of differential HCSL or LVDS outputs. Features • Packaged in 20-pin TSSOP • Pb (lead) free packaging • Operating voltage of 3.
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