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70T3799M - DUAL-PORT STATIC RAM

Download the 70T3799M datasheet PDF. This datasheet also covers the 70T3719 variant, as both devices belong to the same dual-port static ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The IDT70T3719/99M is a high-speed 256K/128K x 72 bit synchronous Dual-Port RAM.

The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports.

Registers on control, data, and address inputs provide minimal setup and hold times.

Key Features

  • True Dual-Port memory cells which allow simultaneous access of the same memory location.
  • High-speed data access.
  • Commercial: 3.6ns (166MHz) 4.2ns (133MHz)(max. ).
  • Industrial: 4.2ns (133MHz) (max. ).
  • Selectable Pipelined or Flow-Through output mode.
  • Counter enable and repeat features.
  • Dual chip enables allow for depth expansion without additional logic.
  • Interrupt and Collision Detection Flags.
  • Full synchronous operation on both ports.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (70T3719-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 70T3799M
Manufacturer Renesas
File Size 590.54 KB
Description DUAL-PORT STATIC RAM
Datasheet download datasheet 70T3799M Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HIGH-SPEED 2.5V 70T3719/99M 256/128K x 72 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location ◆ High-speed data access – Commercial: 3.6ns (166MHz) 4.2ns (133MHz)(max.) – Industrial: 4.2ns (133MHz) (max.) ◆ Selectable Pipelined or Flow-Through output mode ◆ Counter enable and repeat features ◆ Dual chip enables allow for depth expansion without additional logic ◆ Interrupt and Collision Detection Flags ◆ Full synchronous operation on both ports – 6ns cycle time, 166MHz operation (23.9Gbps bandwidth) – Fast 3.6ns clock to data out – Self-timed write allows fast cycle time Functional Block Diagram BE7L – 1.7ns setup to clock and 0.