72T36125 Overview
2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS 65,536 x 36 131,072 x 36 262,144 x 36 IDT72T36105 IDT72T36115.
72T36125 Key Features
- Up to 225 MHz Operation of Clocks
- User selectable HSTL/LVTTL Input and/or Output
- 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage
- 3.3V Input tolerant
- Read Enable & Read Clock Echo outputs aid high speed operation
- User selectable Asynchronous read and/or write port timing
- Mark & Retransmit, resets read pointer to user marked position
- Write Chip Select (WCS) input enables/disables Write operations
- Read Chip Select (RCS) synchronous to RCLK
- Programmable Almost-Empty and Almost-Full flags, each flag can default to one of eight preselected offsets