Overview: Port Synchronizer for IEEE 1588 and 10G/ 40G/ 100G Synchronous Ethernet 82P33741
Datasheet HIGHLIGHTS
• DPLL1 and DPLL2 can be used on line cards to manage the generation of synchronous port clocks and IEEE 1588 synchronization signals based on multiple system backplane references
• DPLL3 can be used on line cards to select ining line clocks for use on system backplanes; it can also be used for general purpose timing applications
• APLL1 and APLL2 generate clocks with jitter < 1 ps RMS (12 kHz to 20 MHz) for: 1000BASE-T and 1000BASE-X ports and to generate IEEE 1588 time stamp clocks and 1 pulse per second (PPS) signals
• APLL3 is Voltage Controlled Crystal Oscillator (VCXO) based and generates clocks with jitter <0.
