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82V3399 Datasheet PDF

Renesas Electronics 82V3399

The 82V3399 is an integrated, single-chip solution for the Synchronous Equipment Timing Source for Stratum 3, 4E, 4, SMC, EECOption1, EEC-Option2 clocks in SONET / SDH / Synchronous Ethernet equipment, DWDM and Wireless base station. The device supports several types of input clock sources: recovered clock from Synchronous Ethernet, STM-N or OC-n, PDH network synchronization timing and external synchronization reference timing. The device consists of T0 and T4 paths.
Part No. 82V3399
Datasheet 82V3399 Download
Manufacturer
Renesas Electronics
Description Clock Generatiion
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82V3399 datasheet page 1 preview

FEATURES

HIGHLIGHTS
● Single chip PLL:
●

FEATURES

0.5 mHz to 560 Hz bandwidth
● Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet (SyncE)
● Exceeds GR-253-CORE (OC-192) and ITU-T G.813 (STM-64) jitter generation requirements
● Provides node clocks for Cellular and WLL base-station (GSM and 3G networks)
● Provides clocks for DSL access concentrators (DSLAM), especially for Japan TCM-ISDN network timing based ADSL equipments
● Provides clocks for 1 Gigabit and 10 Gigabit Ethernet applications
● It supports clock generation for IEEE-1588 application MAIN

FEATURES

● Provides an integrated single-chip solution for Synchronous Equipment Timing Source, including Stratum 3, 4E, 4, SMC, EEC-Option 1 and EEC-Option 2 Clocks
● Provides SONET clocks with less than 1 ps of RMS Phase Jitter (12 kHz - 20 MHz)
● Supports 1PPS input and output
● Employs PLL architecture to feature excellent jitter performance and minimize the number of the external components
● Integrates T0 DPLL and T4...
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