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83026I-01 - 1-to-2 Differential-to-LVCMOS/LVTTL Fanout Buffer

General Description

The 83026I-01 is a low skew, 1-to-2 Differential-to-LVCMOS/LVTTL Fanout Buffer.

The differential input can accept most differential signal types (LVPECL, LVDS, LVHSTL, HCSL and SSTL) and translate to two single-ended LVCMOS/LVTTL outputs.

Key Features

  • Two LVCMOS / LVTTL outputs.
  • Differential CLK, nCLK input pair.
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL.
  • Maximum output frequency: 350MHz.
  • Output skew: 15ps (maximum).
  • Part-to-part skew: 600ps (maximum).
  • Additive phase jitter, RMS: 0.03ps (typical).
  • Small 8 lead SOIC package saves board space.
  • 3.3V core, 3.3V, 2.5V or 1.8V output operating supply.

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Datasheet Details

Part number 83026I-01
Manufacturer Renesas
File Size 366.93 KB
Description 1-to-2 Differential-to-LVCMOS/LVTTL Fanout Buffer
Datasheet download datasheet 83026I-01 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Low Skew, 1-to-2 Differential-to-LVCMOS/LVTTL Fanout Buffer 83026I-01 Data Sheet GENERAL DESCRIPTION The 83026I-01 is a low skew, 1-to-2 Differential-to-LVCMOS/LVTTL Fanout Buffer. The differential input can accept most differential signal types (LVPECL, LVDS, LVHSTL, HCSL and SSTL) and translate to two single-ended LVCMOS/LVTTL outputs. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space. FEATURES • Two LVCMOS / LVTTL outputs • Differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 350MHz • Output skew: 15ps (maximum) • Part-to-part skew: 600ps (maximum) • Additive phase jitter, RMS: 0.