843S06 Description
The 843S06 is a low voltage, low skew 3.3V LVPECL Clock Synthesizer. The device targets clock distribution in SDH/SONET telemunication systems but is well suited for a wide range of applications requiring high performance high-speed clock synthesis. The device implements a fully integrated multiplying PLL including:.
843S06 Key Features
- Six differential 3.3V LVPECL outputs
- Three selectable differential reference clock inputs Clock frequency range: 19MHz to 622MHz
- REF_CLKx, nREF_CLKx pairs can accept the following differential input level: LVPECL
- Intrinsic jitter: 0.017mUI @ 622MHz RMS
- Output skew: 200ps (maximum)
- Optional external VCXO possible
- Simple external loop filter
- Lock detect output signal
- Full 3.3V operating supply
- Low power operation 0.6W (typical)